Today, in the digital era, modern electronic devices utilize a variety of integrated circuits (ICs) to deliver the powerful and myriad of functions and applications available from such devices. It is not uncommon for such devices to have numerous ICs configured therein to cooperate and communicate in an orderly way to exchange information (e.g., receive and/or transmit different types of data and/or information) among themselves and between other external devices and/or the user of the device.
Central to such communications between and among these ICs is the ability of one IC to send data or other information to another IC (or ICs) in response to, for example, a query signal from another IC. These point-to-point interfaces typically occur across a bus structure that serves as a common communication channel for a plurality of ICs configured within the device. This bus structure can be facilitated by either custom communications interfaces or standardized interfaces that provide a standardized communication link.
One such standardized bus system is the so-called Inter-Integrated Circuit bus or the I2C bus. The I2C is a multi-master, multi-slave, single-ended, serial computer bus protocol and system. The I2C bus operates on a protocol that allows a plurality of ICs to be connected to and in communication with one another over a common bus structure. More particularly, I2C is a serial bus protocol that allows various ICs or other components within a device to communicate with one another where each IC or component is assigned a unique address. As such, the I2C system grows as more types of ICs are uniquely registered. The I2C system then employs such unique addresses to send and/or receive data to and/or from a particular IC.
Another well-known bus communications standard is the so-called Serial Peripheral Interface (SPI) bus. The SPI bus is a synchronous serial communication interface specification used for short distance communication, primarily in embedded systems, by microcontrollers for communicating with one or more peripheral devices. In accordance with SPI, there is always one master device (typically a microcontroller) which controls the peripheral devices and there are typically three common lines and one line specific for each device. SPI is sometimes referred to as a so-called four-wire serial bus, contrasting it with three, two or one-wire serial bus architectures. SPI-compliant ICs or other devices communicate in a full duplex mode using a master-slave architecture with a single master. The master device originates the frame for reading and writing whereby multiple slave ICs or other devices are supported through a selection with individual so-called slave select lines.
In distributed on-chip digital interfaces, such as I2C or SPI, the distribution of numerous digital control lines poses certain challenges such as routing, silicon footprint (i.e., potentially wasting expensive silicon area of an IC), and signal interference among devices (e.g., analog signal interference in analog signaling applications). As such, the design of densely packed, digitally-assisted application specific integrated circuits (ASICs) are known to exacerbate the aforementioned challenges.
Therefore, a need exists for an improved technique that addresses these types of IC design challenges with respect to such distributed on-chip digital interfaces.